What in EDS hardware determines different energy resolutions for same chip size?

[D.]

This might be a "duh" question to some, but I was wondering what in EDS hardware/electronics determines a potential range in energy resolution for a given chip size. E.g., three models with 126, 129, 134 eV resolution for the same detector size.

Thanks,
Deon.

[Anette von der Handt]

Hi Deon,

Oxford has a very nice application note on SDD EDS detectors ("Silicon drift detectors explained") on their web page. Therein they state that "The resolution achieved by a detector is dependent on the sources of noise from the sensor and how they are processed by the counting chain". Noise comes from (1) Voltage noise, (2) leakage current, (3) 1/F Noise. It covers some more details in it.

I found this application note very informing overall, well worth the read. I like to hand it to my students when we cover EDS.

Cheers,

Anette

[D.]

Thanks Anette.

I think I tried to download that at some point...maybe it was one of those that want your email etc. before you are allowed to download. I probably just moved on to the EDAX version, since I have that one.

So your comment implies that they just (somehow) reduce noise, in increments, and presumably charge less for more noise. So it's a marketing thing. Interesting....

D.

[jon_wade]

Thanks Anette.

I think I tried to download that at some point...maybe it was one of those that want your email etc. before you are allowed to download. I probably just moved on to the EDAX version, since I have that one.

So your comment implies that they just (somehow) reduce noise, in increments, and presumably charge less for more noise. So it's a marketing thing. Interesting....

D.

no, although to be fair, there probably is a price/accuracy correlation but its not all marketing guff.

Designing low noise amplifiers isn't exactly easy - the quality of the cooling, wafer fabrication,  the design of the on-chip(detector) amplifier and the quality of the amplifier chain post detector will all play a significant role in both price and resolution.  All will have an implicit cost.  I would guess many of the resolution capablities are fixed at the fabrication stage - better performing chips go off to be put in higher resolution systems and poorer in cheaper.  Same happens with car engines, computer processors etc.  To be honest, I am always amazed they can measure the energy of a million x-rays a second.

[D.]

I knew a fish would pick up the bait I left dangling ....Great to add another voice to the discussion.

Sure, what you say could be true.

[John Donovan]

I knew a fish would pick up the bait I left dangling ....Great to add another voice to the discussion.

Sure, what you say could be true.

I was hoping that one of the EDS vendors would chime in...

[Nicholas Ritchie]

Today, EDS resolution is determined by:
  * The ultimate limit is due to the Fano factor which characterizes the statistical spread in the number of collected photo-electrons.  This is physics and for Si can't really be changed except a small amount through cooling.  The limit from the Fano factor is approximately 121 eV at Mn Ka (as I recall).
  * Then there is electronics.  The quality of the preamplifier is critical.  Amplifying small currents at high speeds is always limited by Johnson noise - again fundamental physics.  But given this, the vendors can optimize their preamplifiers to get as close as possible to this physical limit.  I think this is probably where most of the recent increases in resolution are found (but I'm not a vendor.)
 * Then there is the digitizer and the quality of the digitizer.  Almost all (??all??) vendors now immediately convert their preamplified pulse stream into digital and then operate in the digital regime.  Sometimes there is a separate circuit to handle the fast discriminator but not necessarily.  Usually the digitization happens at 100 Mhz or so there are many, many digitizations over a single X-ray event.
 * Pulse processing times are implemented by averaging the digitized signal.  More averaging leads to better resolution (up to a point.)
 * Then there is the digital magic that the vendors perform to estimate the pre-X-ray baseline and the post-X-ray baseline - the difference being the best estimate of the energy.  There is a leakage current from the detector that needs to be compensated.  There is additional digital magic to reject coincidence events and to differentiate noise from signal at the lowest energies.
 * There are other reasons why the resolution diminishes like incomplete charge collection (which has been almost eliminate in modern detectors) but these are the biggies. ( I hope I haven't forgotten anything  )

I'm overawed by the resolutions I've measured on some detectors (as good as 124 eV at Mn Ka).  We can't expect to see too much additional improvement.

[Probeman]

I'm overawed by the resolutions I've measured on some detectors (as good as 124 eV at Mn Ka).  We can't expect to see too much additional improvement.

This is a great summary, thanks.

I would just comment your last point that although current Si drift detector technology may not be improved too much more in energy resolution, as you know: "Predictions are hard, especially about the future."   

[Nicholas Ritchie]

Of course, I'm talking about improvements in detectors based on photo-absorption in Si.  The Fano factor is limit here and the limit is 121 eV at Mn Ka.  However, other technologies like microcalorimeters are a different thing.  I've seen resolutions on the order of a few eV here.  However, I wouldn't trade my SDD for a microcal except for a tiny number of metrology research applications.  I'll take the speed and stability of an SDD over the resolution of a microcal for quant work.

[jensrafaelsen]

The resolution of the individual SDD is mostly set at the wafer fabrication level. The "Digital Pulse Processors - Theory of Operation" document at https://www.amptek.com/resources/application-notes is worth a read and on page 5 there's a general expression for the noise in an SDD:

ENC^2 = (2qI_leak + R_P)(A_p*T_peak)+(e_pink^2*C_in^2)+(4kT/(2/3)g_m)(C_in^2*A_s/T_peak)

SDD's are usually made in full wafer runs, and there's often a large spread of the leakage current (I_leak) ranging from total failure to very small with the average somewhere in between. The best devices goes into the premium product, the worst ones goes to something like handheld XRF where the resolution requirements are less stringent. The premium SDD doesn't cost any more to make than the entry level one (at least on the chip level), but for a wafer run you might only get a few that qualifies as premium level and a majority that does not.

Most of the recent improvements in the resolution comes from the pre-amp where most vendors have gone to a CMOS device and placed them as close as possible to (or on) the SDD itself. This helps reduce the total input capacitance (C_in) and also affects the transconductance (g_m).

It's possible to tweak the resolution a bit by adjusting the temperature of the device (T) which also helps improve the leakage current, but it will only bring you so far. Most SDDs today run from anywhere close to room temperature down to about -60C.